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| Preliminary Technical Data FEATURES 17.5 dB Gain at 1950MHz Matched 50- input and output Noise Figure of1.0 dB 1950MHz OIP3 of 33.7dBm typ at 1950MHz Single 5V Supply Operation Operating current of 65ma at +5V LFCSP 3x3 mm Package 400 MHz - 4 GHz Low Noise Amplifier ADL5523 FUNCTIONAL BLOCK DIAGRAM ADL5523 VBIAS BIAS VDD INP OUT GENERAL DESCRIPTION The ADL5523 is a high performance GaAs pHEMT low-noise amplifier. It provides high gain and low noise figure for single down-conversion IF sampling receiver architectures as well as direct down conversion receivers. The ADL5523 amplifier comes in a compact, thermally enhanced 3x3mm LFCSP package and operates over the temperature range of -40C to +85C. GND GND Figure 1. . Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2003 Analog Devices, Inc. All rights reserved. ADL5523 SPECIFICATIONS VS = 5 V, T = 25C, ZS = ZL = 50 , fC= 1950MHz Table 1. Parameter Conditions Preliminary Technical Data Min Typ Max Unit Input return loss Output return loss Gain Gain Flatness Gain Tempco Noise Figure Output IP3 Output 1 dB Compression Point S12 Isolation POWER-INTERFACE Supply Voltage Current Consumption External match External match 14 13 17.5 dB dB dB dB/MHz dB/C dB dBm dBm dB In the [1920 - 1980] frequency band In the [1920 - 1980] frequency band 0.015 0.011 1.0 33.7 21.9 22 4.5 5 65 5.5 V mA Rev. PrA | Page 2 of 6 Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, VPOS Max RF Input Level Internal Power Dissipation JA (Exposed paddle soldered down) JA (Exposed paddle not soldered down) JC (At exposed paddle) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature Range (Soldering 60 sec) Rating 5.5 V TBD TBD mW TBD mW TBDC/W TBDC/W TBDC/W TBDC -40C to +85C -65C to +150C ADL5523 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. PrA | Page 3 of 6 ADL5523 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS Preliminary Technical Data 1 VBIAS VDD 8 2 3 ADL5523 OUT top view NC NC (not to scale) INP NC Exposed pad 7 6 4 NC 5 Figure 2. 8-Lead LFCSP Table 3. Pin Function Descriptions- 8 Lead CSP Pin No. 1 2 3,4,5,6 7 8 Exposed pad Mnemonic VBIAS INP NC OUT VDD EP Description Bias: Internal DC bias RF Input: Must be AC-coupled. NC: No internal connection RF Output: Must be AC-coupled. Supply: VDD bias needs to be bypassed to ground using low-inductance capacitors. Exposed Paddle: Connect to a low impedance ground plane Rev. PrA | Page 4 of 6 Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS 76 74 72 IPOS - mA 70 68 66 64 62 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature - degC ADL5523 38 37 36 35 34 33 32 31 30 29 28 27 26 25 -8 -40C (1920MHz 1950MHz 1980MHz) OIP3 - dBm +85C (1920MHz 1950MHz 1980MHz) +25C (1920MHz 1950MHz 1980MHz) -6 -4 -2 0 2 4 6 8 10 12 14 16 18 20 Pout - dBm Figure 7.O IP3 vs. Output Power, Temperature and Frequency 1.4 1.2 Noise Figure - dB 1 0.8 0.6 0.4 0.2 Figure 3. ADL5523 Current vs. Temperature 25 20 Pout (dBm), Gain (dB) 15 Gain (-40C +25C +85C) 10 5 Output Power (-40C +25C +85C) 0 1920 1930 1940 1950 Frequency - MHz 1960 1970 1980 0 -5 -25 -20 -15 -10 Pin - dBm -5 0 5 10 Figure 8.Distribution of Noise Figure for Five Parts, 1920 to 1980 MHz 5 Figure 4. Output Power and Gain vs. Temperature 30 28 40 4.5 4 Noise Figure - dB 3.5 3 2.5 2 1.5 1 0.5 0 400 Gain, P1dB - dB(m) 26 24 22 20 18 16 14 1920 OIP3 (-40C +25C +85C) 35 30 25 P1dB (-40C +25C +85C) 20 15 Gain (-40C +25C +85C) 10 5 0 1980 OIP3 - dBm 900 1400 1900 2400 2900 Frequency - MHz 1930 1940 1950 1960 1970 Freq - MHz Figure 9. Distribution of Noise Figure for Five Parts, Complete Frequency Range 20 15 10 Figure 5. Gain, P1dB, OIP3 vs. Frequency S21 20 S-parameters - dB 5 0 -5 -10 -15 -20 -25 18 16 14 Gain (dB) 12 10 8 6 4 2 0 400 S22 S11 S12 1930 1940 1950 1960 1970 1980 -30 1920 Freq - MHz 900 1400 1900 2400 2900 Frequency - MHz Figure 10. Typical S Parameters, 1920 to 1980 MHz Figure 6. Gain vs. Frequency, Complete Frequency Range, 5 Parts Rev. PrA | Page 5 of 6 ADL5523 OUTLINE DIMENSIONS 0.50 0.40 0.30 Preliminary Technical Data 3.25 3.00 SQ 2.75 0.50 BSC 0.60 MAX PIN 1 INDICATOR TOP VIEW 2.95 2.75 SQ 2.55 8 1 PIN 1 INDICATOR 1.89 1.74 1.59 (BOTTOM VIEW) EXPOSED PAD 0.30 0.23 0.18 0.90 MAX 0.85 NOM 12 MAX 0.70 MAX 0.65 TYP 0.05 MAX 0.01 NOM 0.20 REF 5 4 1.60 1.45 1.30 Figure 3. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3mm x 3 mm Body, Very Thin, Dual Lead CP-8-2 Dimensions shown in millimeters ORDERING GUIDE Model ADL5523ACPZ-R71 ADL5523ACPZ-WP1 ADL5523-EVALZ Temperature Range - 40 C to + 8 5 C -40C to +85C Package Description 7 " T a pe a n d R e e l Waffle Pack Ev aluation Boar d Package Option C P - 8- 2 CP-8-2 1 Z = Pb free part (c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06829-0-5/07(PrA) Rev. PrA | Page 6 of 6 022107-A |
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